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[VHDL-FPGA-Veriloguart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[Com PortUART

Description: 内含有完整的UART代码,包括发送和接受,且有testbench,可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[Otherkehshechenxu

Description: 编制一全双工UART电路,通过试验箱MAX202E转换成RS232电平,与计算机进行通讯实验,设置8个按键,按键值为ASIC码“1”~“8”,通过串口发送给计算机,在计算机上显示键值,同时在数码管最高位显示;计算机可发送“0”~“F”的ASIC码,FPGA接收后在数码管低位显示0~F。通过按键可设置波特率。 要求:波特率为三种 1200、2400、9600,由1个按键选择,3个LED分别指示; 数据格式为1位起始位、8位数据位和一位停止位; 上位计算机发送接收软件可使用“串口调试器“软件; 发送和接收数据时,由两个LED分别指示。 发挥:自动回发功能、接收到特殊字符(自定义)自动更改波特率。(A full duplex UART circuit, converted into RS232 level by MAX202E test box, communication experiment with computer, set of 8 buttons, keys for ASIC code "1" to "8", to the computer through the serial port to send and display keys on the computer, at the same time in the digital tube display high computer can send "; 0" to "F" in the ASIC code, FPGA after receiving the digital tube display low 0~F. You can set the baud rate by the button. Requirements: baud rate for three, 1200, 2400, 9600, selected by 1 buttons, 3 LED, respectively; The data format consists of 1 bit start bits, 8 bit data bits, and one stop bit; The upper computer sends and receives the software, and the serial debugger can be used; When sending and receiving data, instructions are given by two LED respectively. Play: Auto postback function, receive special characters (custom), change baud rate automatically.)
Platform: | Size: 2948096 | Author: 淡淡的意识 | Hits:

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